View AS58C1001SF_526112.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

EEPROM
Austin Semiconductor, Inc. 128K x 8 EEPROM
EEPROM Memory
AVAILABLE AS MILITARY SPECIFICATIONS
l l
AS58C1001
PIN ASSIGNMENT (Top View)
32-Pin CFP (F & SF), 32-Pin CSOJ (DCJ)
RDY/BUSY\ A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O 0 I/O 1 I/O 2 Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc A15 RES\ WE\ A13 A8 A9 A11 OE\ A10 CE\ I/O 7 I/O 6 I/O 5 I/O 4 I/O 3
SMD 5962-38267 MIL-STD-883
FEATURES
High speed: 150, 200, and 250ns Data Retention: 10 Years l Low power dissipation, active current (20mW/MHz (TYP)), standby current (100W(MAX)) l Single +5V (+10%) power supply l Data Polling and Ready/Busy Signals l Erase/Write Endurance (10,000 cycles in a page mode) l Software Data protection Algorithm l Data Protection Circuitry during power on/off l Hardware Data Protection with RES pin l Automatic Programming: Automatic Page Write: 10ms (MAX) 128 Byte page size
l l
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS58C1001 is a 1 Megabit CMOS Electrically Erasable Programmable Read Only Memory (EEPROM) organized as 131, 072 x 8 bits. The AS58C1001 is capable or in system electrical Byte and Page reprogrammability. The AS58C1001 achieves high speed access, low power consumption, and a high level of reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology and CMOS process and circuitry technology. This device has a 128-Byte Page Programming function to make its erase and write operations faster. The AS58C1001 features Data Polling and a Ready/Busy signal to indicate completion of erase and programming operations. This EEPROM provides several levels of data protection. Hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit during power on and off. Software data protection is implemented using JEDEC Optional Standard algorithm. The AS58C1001 is designed for high reliability in the most demanding applications. Data retention is specified for 10 years and erase/write endurance is guaranteed to a minimum of 10,000 cycles in the Page Mode.
OPTIONS
l
MARKINGS
l
l
Timing 150ns access -15 200ns access -20 250ns access -25 Packages Ceramic Flat Pack F Radiation Shielded Ceramic FP* SF Ceramic SOJ DCJ Operating Temperature Ranges -Military (-55oC to +125oC) -Industrial (-40oC to +85oC)
No. 306 No. 305 No. 508 XT IT
*NOTE: Package lid is connected to ground (Vss).
PIN NAME A0 to A16 I/O0 to I/O7 OE\ CE\ WE\ Vcc Vss RDY/Busy\ RES\
AS58C1001 Rev. 4.0 3/01
FUNCTION Address input Data input/output Output enable Chip enable Write enable Power supply Ground Ready busy Reset
For more products and information please visit our web site at www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
EEPROM
Austin Semiconductor, Inc.
AS58C1001
FUNCTIONAL BLOCK DIAGRAM
Vcc Vss High Voltage Generator I/O0 I/O7 Ready/Busy
OE\
I/O Buffer and Input Latch Control Logic and Timing
CE\ WE\ RES\
A0 A6 Y Decoder Y Gating
Address Buffer and Latch X Decoder A7 A16 Memory Array
Data Latch
MODE SELECTION
MODE READ STANDBY WRITE DESELECT WRITE INHIBIT DATA POLLING PROGRAM
Notes:
1. RDY/Busy\ output has only active LOW VOL and HIGH impedance state. It can not go to HIGH (VOH) state.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
CE\ VIL VIH VIL VIL X X VIL X
OE\ VIL X VIH VIH X VIL VIL X
WE\ VIH X VIL VIH VIH X VIH X
RES\ VH X VH VH X X VH VIL
RDY/BUSY\ High-Z High-Z
1
I/O DOUT High-Z DIN High-Z ----Data Out (I/O7) High-Z
High-Z to VOL High-Z ----VOL High-Z
2
EEPROM
Austin Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
AUTOMATIC PAGE WRITE The Page Write feature allows 1 to 128 Bytes of data to be written into the EEPROM in a single cycle and allows the undefined data within 128 Bytes to be written corresponding to the undefined address (A0 to A6). Loading the first Byte of data, the data load window of 30s opens for the second. In the same manner each additional Byte of data can be loaded within 30s. In case CE\ and WE\ are kept high for 100s after data input, the EEPROM enters erase and write automatically and only the input data can be written into the EEPROM. In Page mode the data can be written and accessed 104 times per page, and in Byte mode 103 times per Byte.
AS58C1001
PROGRAMMING/ERASE
The 58C1001 does NOT employ a BULK-erase function. The memory cells can be programmed `0' or `1'. A write cycle performs the function of erase & write on every cycle with the erase being transparent to the user. The internal erase data state is considered to be `1'. To program the memory array with background of ALL 0's or All 1's, the user would program this data using the page mode write operation to program all 1024 128-byte pages.
DATA PROTECTION
To protect the data during operation and power on/off, the AS58C1001 has: 1. Data protection against Noise on Control Pins (CE\, OE\, WE\) during Operation. During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the AS58C1001 has a noise cancellation function that cuts noise if its width is 20ns or less in programming mode. Be careful not to allow noise of a width of more than 20ns on the control pins.
DATA\ POLLING
Data\ Polling allows the status of the EEPROM to be determined. If the EEPROM is set to Read mode during a Write cycle, and inversion of the last Byte of data to be loaded outputs from I/O, to indicate that the EEPROM is performing a Write operation.
WRITE PROTECTION
(1) Noise protection: Noise on a write cycle will not act as a trigger with a WE\ pulse of less than 20ns. (2) Write inhibit: Holding OE\ low, WE\ high or CE\ high, inhibits a write cycle during power on/off.
WE\ AND CE\ PIN OPERATION
During a write cycle, addresses are latched by the falling edge of WE\ or CE\, and data is latched by the rising edge of WE\ or CE\.
WRITE/ERASE ENDURANCE AND DATA RETENTION
The endurance with page programming is 104 cycles (1% cumulative failure rate) and the data retention time is more than 10 years when a device is programmed less than 104 cycles.
RDY/Busy\ SIGNAL
RDY/Busy\ signal also allows status of the EEPROM to be determined. The RDY/Busy\ signal has high impedance except in write cycle and is lowered to VOL after the first write signal. At the end of the write cycle, the RDY/Busy\ signal changes state to high impedance. This allows many 58C1001 devices RDY/Busy\ signal lines to be wired-OR together.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
EEPROM
Austin Semiconductor, Inc.
(EXAMPLE)
AS58C1001
Vcc
RES\
*unprogrammable *unprogrammable
FUNCTIONAL DESCRIPTION (continued) Write Address
DATA PROTECTION (continued) 2. Data protection at Vcc on/off. When RES\ is low, the EEPROM cannot be erased and programmed. Therefore, data can be protected by keeping RES\ low when Vcc is switched. RES\ should be high during programming because it does not provide a latch function. When Vcc is turned on or off, noise on the control pins generated by external circuits (CPU, etc.) may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in an unprogrammable, standby or readout state by using a CPU reset signal to RES\ pin. In addition, when RES\ is kept high at Vcc on/off timing, the input level of control pins (CE\, OE\, WE\) must be held as CE\=Vcc or OE\=LOW or WE\=Vcc level. 3. Software Data Protection To protect against unintentional programming caused by noise generated by external circuits, AS58C1001 has a Software data protection function. To initate Software data protection mode, 3 bytes of data must be input, followed by a dummy write cycle of any address and any data byte. This exact sequence switches the device into protection mode. This 4th cycle during write is required to initiate the SDP and physically writes the address and data. While in SDP the entire array is protected in which writes can only occur if the exact SDP sequence is re-executed or the unprotect sequence is executed.
Write Data (Normal Data Input) AA 55 A0
5555 2AAA 5555
The Software data protection mode can be cancelled by inputting the following 6 Bytes. This changes the AS58C1001 to the Non-Protection mode, for normal operation.
Address 5555 2AAA 5555 5555 2AAA 5555
4
Data AA 55 80 AA 55 20
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
EEPROM
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS* Voltage on Vcc Supply Relative to Vss................-0.5V to +7.0V1 Voltage on any pin Relative to Vss.......................-0.6V to +7.0V1 Storage Temperature ............................................-65C to +150C Operating Temperature Range.............................-55oC to +125oC Soldering Temperature Range...............................................260oC Maximum Junction Temperature**....................................+150C Power Dissipation...................................................................1.0W
AS58C1001
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ** Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55oC < TA < 125oC; Vcc = 5V +10%)
PARAMETER Input High (Logic 1) Voltage 3 Input Low (Logic 0) Voltage Input Voltage (RES\ Pin) 4 Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage CONDITION SYMBOL VIH VIL VH ILI ILO VOH VOL MIN 2.2 -0.3 Vcc-0.5 -2 -2 2.4 MAX VCC + 0.3V 0.8 VCC +1.0 2 2 0.4 UNITS V V V V V NOTES 9 2 4
OV < VIN < Vcc Output(s) disabled, OV < VOUT < Vcc IOH = -400 A IOL = 2.1 mA
PARAMETER
CONDITIONS IOUT=OmA, Vcc = 5.5V Cycle=1S, Duty=100%
SYM
-15 20
MAX -20 20
-25 20
UNITS NOTES
Power Supply Current: Operating
ICC3 IOUT=OmA, Vcc = 5.5V Cycle=MIN, Duty=100% 65 55 50
mA
CE\=Vcc, Vcc = 5.5V Power Supply Current: Standby CE\=VIH, Vcc = 5.5V
ICC1
350
350
350
A
ICC2
3
3
3
mA
CAPACITANCE
PARAMETER Input Capacitance Output Capactiance CONDITIONS TA = 25 C, f = 1MHz VIN = 0
o
SYMBOL CIN Co
MAX 6 12
UNITS pF pF
NOTES
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
EEPROM
Austin Semiconductor, Inc.
AS58C1001
AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION (-55oC < TC < 125oC; Vcc = 5V +10%)
Test Conditions
l l l l
Input Pulse Levels: Input rise and fall times: Output Load: Reference levels for measuring timing:
0.0V to 3.0V < 20ns 1 TTL Gate +100pF (including scope and jig) 1.5V, 1.5V

! ! "
& ! ") $% ! &'

#

#
#

AC ELECTRICAL CHARACTERISTICS FOR SOFTWARE DATA PROTECTION CYCLE OPERATION
PARAMETER Byte Load Cycle Time Write Cycle Time SYMBOL tBLC tWC MIN 0.55 10 MAX 30 --UNITS S mS
AC ELECTRICAL CHARACTERISTICS FOR DATA\ POLLING OPERATION
PARAMETER Output Enable Hold Time Output Enable to Write Setup Time Write Start Time Write Cycle Time SYMBOL tOEH tOES tDW tWC MIN 0 0 150 --MAX ------10 UNITS ns ns ns ms
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
EEPROM
Austin Semiconductor, Inc.
AS58C1001
AC ELECTRICAL CHARACTERISTICS FOR PAGE ERASE AND PAGE WRITE OPERATIONS

*# "# ' "# % ' "#

"# $ "%
*# ( ( "# ' ( % ' ( & ' "# & ' ( % "# ") !

"#

AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
EEPROM
Austin Semiconductor, Inc.
AS58C1001
AC ELECTRICAL CHARACTERISTICS FOR BYTE ERASE AND BYTE WRITE OPERATIONS
PARAMETER Address Setup Time Chip Enable to Write Setup Time Write Pulse Width Address Hold Time Data Setup Time Data Hold Time Chip Enable Hold Time Out Enable to Write Setup Time Output Enable Hold Time Write Cycle Time Byte Load Window Time to Device Busy RES\ to Write Setup Time Vcc to RES\ Setup Time SYMBOL tAS tCS
7 8 7
MIN 0 0 250 250 150 100 10 0 0 0 10 100 120 100 1
MAX -------------------------------
UNITS ns ns ns ns ns ns ns ns ns ns ms s ns s s
tCW tWP
tAH tDS tDH tCH
7
tOES tOEH tWC tBL tDB tRP tRES
10
AC TEST CONDITIONS
Input Pulse Levels............................................0V to 3V Input Rise and Fall Times....................................<20ns Input Timing Reference Level................................1.5V Output Reference Level..........................................1.5V Output Load................................................See Figure 1
NOTES:
1. 2. 3. 4. 5. Relative to Vss VIN min = -3.0V for pulse widths <50ns VIL min = -1.0V for pulse widths <50ns IIL on RES\ = 100ua MAX tOF is defined as the time at which E the output becomes and open circuit and data is no longer driven. 6. Use this device in longer cycle than this value 7. WE\ controlled operation 8. CE\ controlled operation 9. RES\ pin VIH is VH 10. Reference only, not tested
Q
100pF 1 TTL GATE EQ.
Figure 1 OUTPUT LOAD EQUIVALENT
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
EEPROM
Austin Semiconductor, Inc. READ TIMING WAVEFORM Address CE\ OE\ WE\ Data Out RES\
SOFTWARE DATA PROTECTION TIMING WAVEFORM (protection mode)
Vcc CE\ WE\
VIH tRR High-Z Data Out Valid tDFR tACC tCE t OE tDF t OH
AS58C1001
tBLC
AAAA or 2AAA
tBLC
tBLC
tWC
Address Data
5555 AA
55
5555 A0
* During this write cycle, data is physically written to address provided.
SOFTWARE DATA PROTECTION TIMING WAVEFORM (non-protection mode)
Vcc CE\ WE\
AAAA or 2AAA AAAA or 2AAA
{
Write Address* Write Data tWC
Normal active mode
Address Data
AS58C1001 Rev. 4.0 3/01
5555 AA 55
5555 5555 80 AA
55 9
5555 20
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
EEPROM
Austin Semiconductor, Inc.
AS58C1001
DATA\ POLLING TIMING WAVEFORM
Address CE\ An An
WE\ tOEH OE\
tCE
tOES t DW DOUT X\ tWC DOUT X
t OE I/O7 DIN X
TOGGLE BIT WAVEFORM
Next Mode Address CE\ tCE
WE\ t OE OE\ tOEH DIN DOUT DOUT tWC D OUT D OUT tOES t DW
I/O7
In transition from HI to LOW or LOW to HI.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
4321 4321 4321
EEPROM
Austin Semiconductor, Inc. PAGE WRITE TIMING WAVEFORM (WE\ CONTROLLED)
AS58C1001
A7 - A16 A0 - A6 WE\
t AS tCS
tAH t WP
t BL t DL tBLC t WC
CE\
tOES
OE\
t DS
tDH
DIN RDY/Busy\
High-Z t RP
t DB
RES\ VCC
tRES
In transition from HI to LOW or LOW to HI.
AS58C1001 Rev. 4.0 3/01
21 3 21 321 4 2132121 432321 21 121 41 3 2132121 43 2132321 21
VOL 11
21 1 21 321 4 2132321 432321 1 2132321 41 2132321 41 21 321 21
21 121 2432321 1 43 2132321 1 21 321 43 1 2132321 2432121 1 21
t CH
tOEH
t DW High-Z
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
EEPROM
Austin Semiconductor, Inc.
AS58C1001
PAGE WRITE TIMING WAVEFORM (CE\ CONTROLLED)
Address A0 to A16 CE\
t AS t WS
tAH t CW
t BL t DL t WH tBLC t WC
WE\
tOES
OE\
t DS
DIN RDY/Busy\
High-Z t RP
RES\ VCC
t RES
AS58C1001 Rev. 4.0 3/01
21 21 21
tOEH
tDH
t DB
t DW
VOL
High-Z
In transition from HI to LOW or LOW to HI.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
EEPROM
Austin Semiconductor, Inc. BYTE WRITE TIMING WAVEFORM (WE\ CONTROLLED)
t WC
AS58C1001
Address
t CS tAH t CH t BL
CE\
t AS
WE\
t OES
t WP
t OEH
OE\
t DS tDH t DW
DIN RDY/Busy\
t DB
High-Z
tRP t RES
VOL
High-Z
RES\ VCC
In transition from HI to LOW or LOW to HI.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
13
EEPROM
Austin Semiconductor, Inc. BYTE WRITE TIMING WAVEFORM (CE\ CONTROLLED)
AS58C1001
Address
t WS tAH t CW t AS t WH t BL t WC
CE\ WE\
t OES
t OEH t DS tDH t DW
OE\ DIN RDY/Busy\
t DB
High-Z
tRP t RES
VOL
High-Z
RES\ VCC
In transition from HI to LOW or LOW to HI.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
14
EEPROM
Austin Semiconductor, Inc. MECHANICAL DEFINITIONS*
ASI Case #305 (Package Designator SF) SMD 5962-38267, Case Outline N
L E
AS58C1001
e
b
D
H
Top View
c Q E1
A
A1 D2 D1
SYMBOL A A1 b c D D1 D2 E E1 e H L Q
*All measurements are in inches.
AS58C1001 Rev. 4.0 3/01
SMD SPECIFICATIONS MIN MAX 0.125 0.150 0.090 0.110 0.015 0.019 0.003 0.007 0.810 0.830 0.775 0.785 0.745 0.755 0.425 0.445 0.290 0.310 0.045 0.055 1.000 1.100 0.290 0.310 0.026 0.037
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
15
EEPROM
Austin Semiconductor, Inc. MECHANICAL DEFINITIONS*
ASI Case #306 (Package Designator F) SMD 5962-38267, Case Outline M
L E
AS58C1001
e
b
D
H
Top View
A1 c D2 E1 Q A
SYMBOL A A1 b c D D2 E E1 e H L Q
SMD SPECIFICATIONS MIN MAX 0.097 0.123 0.090 0.110 0.015 0.019 0.003 0.007 0.810 0.830 0.745 0.755 0.425 0.445 0.330 0.356 0.045 0.055 1.000 1.100 0.290 0.310 0.026 0.037
NOTE: All drawings are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
*All measurements are in inches.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
16
EEPROM
Austin Semiconductor, Inc. MECHANICAL DEFINITIONS*
ASI Case #508 (Package Designator DCJ)
AS58C1001
A
A1
e
D D1
B b
E2 E1
E A2
SYMBOL A A1 A2 B b D D1 E E1 E2 e
ASI PACKAGE SPECIFICATIONS MIN MAX 0.132 0.142 0.076 0.086 0.018 0.028 0.018 0.032 0.015 0.019 0.816 0.834 0.745 0.755 0.430 0.440 0.465 0.485 0.415 0.425 0.045 0.055
*All measurements are in inches.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
17
EEPROM
Austin Semiconductor, Inc.
AS58C1001
ORDERING INFORMATION
EXAMPLE: AS58C1001F-25/XT Device Number AS58C1001 AS58C1001 AS58C1001 Package Type F F F Speed ns -15 -20 -25 Process /* /* /*
EXAMPLE: AS58C1001SF-15/IT Device Number AS58C1001 AS58C1001 AS58C1001 Package Speed Process Type ns SF SF SF -15 -20 -25 /* /* /*
EXAMPLE: AS58C1001DCJ-20/IT Device Number AS58C1001 AS58C1001 AS58C1001 Package Type DCJ DCJ DCJ Speed ns -15 -20 -25 Process /* /* /*
*AVAILABLE PROCESSES
IT = Industrial Temperature Range XT = Extended Temperature Range 883C = Full Military Processing -40oC to +85oC -55oC to +125oC -55oC to +125oC
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
18
EEPROM
Austin Semiconductor, Inc.
AS58C1001
ASI TO DSCC PART NUMBER CROSS REFERENCE*
Package Designator F ASI Part #
AS58C1001F-25/883C AS58C1001F-20/883C AS58C1001F-15/883C
SMD Part#
5962-3826716QMA 5962-3826717QMA 5962-3826718QMA
Package Designator SF ASI Part #
AS58C1001SF-25/883C AS58C1001SF-20/883C AS58C1001SF-15/883C
SMD Part#
5962-3826716QNA 5962-3826717QNA 5962-3826718QNA
Package Designator DCJ not currenly available on the SMD.
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
AS58C1001 Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
19

▲Up To Search▲

Price & Availability of AS58C1001SF

	To Download AS58C1001SF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .